Optimizing resource efficiencies for scalable full-stack quantum computers

M Fellous-Asiani, JH Chai, Y Thonnart, HK Ng… - PRX Quantum, 2023 - APS
In the race to build scalable quantum computers, minimizing the resource consumption of
their full stack to achieve a target performance becomes crucial. It mandates a synergy of …

Real-time decoding for fault-tolerant quantum computing: Progress, challenges and outlook

F Battistel, C Chamberland, K Johar… - Nano …, 2023 - iopscience.iop.org
Quantum computing is poised to solve practically useful problems which are computationally
intractable for classical supercomputers. However, the current generation of quantum …

CMOS compatibility of semiconductor spin qubits

ND Stuyck, A Saraiva, W Gilbert, JC Pardo, R Li… - arXiv preprint arXiv …, 2024 - arxiv.org
Several domains of society will be disrupted once millions of high-quality qubits can be
brought together to perform fault-tolerant quantum computing (FTQC). All quantum …

A Cryo-CMOS DAC-Based 40-Gb/s PAM4 Wireline Transmitter for Quantum Computing

N Fakkel, M Mortazavi, RWJ Overwater… - IEEE Journal of Solid …, 2024 - ieeexplore.ieee.org
Addressing the advancement toward large-scale quantum computers, this article presents
the first four-level pulse amplitude modulation (PAM4) wireline transmitter (TX) operating at …

Cryogenic CMOS Design for Qubit Control: Present Status, Challenges, and Future Directions [Feature]

S Chakraborty, RV Joshi - IEEE Circuits and Systems …, 2024 - ieeexplore.ieee.org
This article will review recent progress in cryogenic CMOS designs for future scaled
quantum computing applications. After introducing the scaling challenges associated with …

Qisim: Architecting 10+ k qubit qc interfaces toward quantum supremacy

D Min, J Kim, J Choi, I Byun, M Tanaka… - Proceedings of the 50th …, 2023 - dl.acm.org
A 10+ K qubit Quantum-Classical Interface (QCI) is essential to realize the quantum
supremacy. However, it is extremely challenging to architect scalable QCIs due to the …

A Quantum Controller IC With DRAG Generation in 40-nm Cryo-CMOS for Scalable Superconducting Quantum Computing

K Kang, S Bae, D Minn, J Lee… - IEEE Journal of Solid …, 2024 - ieeexplore.ieee.org
This article presents a cryo-CMOS controller that supports derivative removal by adiabatic
gate (DRAG) pulses without requiring internal memory. The proposed scheme uses …

A Fault-Tolerant Million Qubit-Scale Distributed Quantum Computer

J Kim, D Min, J Cho, H Jeong, I Byun, J Choi… - Proceedings of the 29th …, 2024 - dl.acm.org
A million qubit-scale quantum computer is essential to realize the quantum supremacy.
Modern large-scale quantum computers integrate multiple quantum computers located in …

A 40 nm Cryo-CMOS Homodyne-Demodulation Readout SoC for Superconducting Qubits

D Minn, K Kang, J Lee, S Bae, B Kim… - IEEE Transactions on …, 2024 - ieeexplore.ieee.org
This paper presents a cryo-CMOS readout SoC based on a homodyne demodulation
architecture with an integrating receiver. The homodyne receiver module for each qubit …

Modeling and Experimental Validation of the Intrinsic SNR in Spin Qubit Gate-Based Readout and Its Impacts on Readout Electronics

B Prabowo, J Dijkema, X Xue… - IEEE Transactions …, 2024 - ieeexplore.ieee.org
In semiconductor spin quantum bits (qubits), the radio-frequency (RF) gate-based readout is
a promising solution for future large-scale integration, as it allows for a fast, frequency …