Scaling beyond 7nm node: An overview of gate-all-around fets

W Hu, F Li - 2021 9th international symposium on next …, 2021 - ieeexplore.ieee.org
Gate-all-around (GAA) is a promising MOSFET structure to continue scaling down the size of
CMOS devices beyond 7 nm technology node. This paper gives an overview of different …

More-than-moore steep slope devices for higher frequency switching applications: a designer's perspective

J Chowdhury, A Sarkar, K Mahapatra, JK Das - Physica Scripta, 2024 - iopscience.iop.org
The progress in IC miniaturization dictated by Moore's Law has taken a leap from mere
circuit integration to IoT enabled System-on-Chip (SoC) deployments. Such systems are …

Sub-10-nm diameter vertical nanowire p-type GaSb/InAsSb tunnel FETs

Y Shao, JA del Alamo - IEEE electron device letters, 2022 - ieeexplore.ieee.org
In this letter, we report the realization of sub-10-nm diameter vertical nanowire (VNW) p-type
tunnel FETs (TFETs). Using a broken-band GaSb/InAsSb heterostructure design and a top …

Improved electrostatics through digital etch schemes in vertical GaSb nanowire p-MOSFETs on Si

Z Zhu, A Jonsson, YP Liu, J Svensson… - ACS Applied …, 2022 - ACS Publications
Sb-based semiconductors are critical p-channel materials for III–V complementary metal
oxide semiconductor (CMOS) technology, while the performance of Sb-based metal-oxide …

Performance enhancement of GaSb vertical nanowire p-type MOSFETs on Si by rapid thermal annealing

Z Zhu, J Svensson, A Jönsson… - Nanotechnology, 2021 - iopscience.iop.org
GaSb is considered as an attractive p-type channel material for future III-V metal-oxide-
semiconductor (MOS) technologies, but the processing conditions to utilize the full device …

A Novel Fin-Shape Double-Gate GaAs p-MOSFET with Intrinsic Source and Enhanced Switching Performance

IC Cherik, S Mohammadi - IEEE Transactions on Dielectrics …, 2024 - ieeexplore.ieee.org
This article introduces a novel double-gate (DG) p-channel MOSFET based on gallium
arsenide (GaAs), in which the source region is intrinsic and the holes are induced in this …

Low-Power, Self-Aligned Vertical InGaAsSb NW PMOS With S< 100 mV/dec

A Krishnaraja, Z Zhu, J Svensson… - IEEE Electron Device …, 2023 - ieeexplore.ieee.org
III-V co-integration is less mature compared to Si/Ge CMOS due to their inferior pMOS
device performance. This letter adopts a novel quaternary InGaAsSb channel material in a …

[HTML][HTML] Hydrogen plasma enhanced oxide removal on GaSb planar and nanowire surfaces

YP Liu, S Yngman, A Troian, G D'Acunto… - Applied Surface …, 2022 - Elsevier
Due to its high hole-mobility, GaSb is a highly promising candidate for high-speed p-
channels in electronic devices. However, GaSb exhibits a comparably thick native oxide …

Vertical III-V Nanowire Transistors for Low-Power Electronics

A Krishnaraja - 2023 - portal.research.lu.se
Power dissipation has been the major challenge in the downscaling of transistor technology.
Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) have struggled to keep a …

III-V Nanowire MOSFETs: RF-Properties and Applications

LE Wernersson - 2020 IEEE BiCMOS and Compound …, 2020 - ieeexplore.ieee.org
III-V MOSFETs provide improved electrostatic control at scaled gate lengths combined with a
considerable reduction in gate leakage current. Following the natural transistor evolution …