In CMOS circuits, the reduction of the threshold voltage due to voltage scaling leads to
increase in subthreshold leakage current and hence static power dissipation. We propose a …

Variations in process parameters affect the operation of integrated circuits (ICs) and pose a
significant threat to the continued scaling of transistor dimensions. Such parameter …

Modern digital IC designs have a critical operating point, or “wall of slack”, that limits voltage
scaling. Even with an error-tolerance mechanism, scaling voltage below a critical voltage-so …

This paper concerns a method for digital circuit optimization based on formulating the
problem as a geometric program (GP) or generalized geometric program (GGP), which can …

We consider active leakage power dissipation in FPGAs and present a" no cost" approach
for active leakage reduction. It is well-known that the leakage power consumed by a digital …

Current processor designs have a critical operating point that sets a hard limit on voltage
scaling. Any scaling beyond the critical voltage results in exceeding the maximum allowable …

The massive growth of the micro-blogging service Twitter has shed the light on the
challenging problem of summarizing a collection of large number of tweets. This paper …

Leakage power has become one of the most critical design concerns for the system level
chip designer. While lowered supplies (and consequently, lowered threshold voltage) and …

This paper presents methods for efficient power minimization at circuit and micro-
architectural levels. The potential energy savings are strongly related to the energy profile of …

Leakage power dissipation is the dominant contributor of total power dissipation in
nanoscale complementary metal oxide semiconductor (CMOS) integrated circuits. CMOS …