Ultimate monolithic-3D integration with 2D materials: rationale, prospects, and challenges
As a possible pathway to continue Moore's law indefinitely into the future as well as
unprecedented beyond-Moore heterogeneous integration, we examine the prospects of …
unprecedented beyond-Moore heterogeneous integration, we examine the prospects of …
InGaAs FinFETs 3-D sequentially integrated on FDSOI Si CMOS with record performance
C Convertino, CB Zota, D Caimi… - IEEE Journal of the …, 2019 - ieeexplore.ieee.org
In this paper, we demonstrate InGaAs FinFETs 3-D sequentially (3DS) integrated on top of a
fully depleted silicon-on-insulator CMOS. Top layer III-V FETs are fabricated using a Si …
fully depleted silicon-on-insulator CMOS. Top layer III-V FETs are fabricated using a Si …
Recent advances in compute-in-memory support for SRAM using monolithic 3-D integration
Z Zhang, X Si, S Srinivasa, AK Ramanathan… - IEEE Micro, 2019 - ieeexplore.ieee.org
Computing-in-memory (CiM) is a popular design alternative to overcome the von Neumann
bottleneck and improve the performance of artificial intelligence computing applications …
bottleneck and improve the performance of artificial intelligence computing applications …
Modeling of a SiGeSn quantum well laser
B Marzban, D Stange, D Rainko, Z Ikonic… - Photonics …, 2021 - opg.optica.org
We present comprehensive modeling of a SiGeSn multi-quantum well laser that has been
previously experimentally shown to feature an order of magnitude reduction in the optical …
previously experimentally shown to feature an order of magnitude reduction in the optical …
InGaAs capacitor-less DRAM cells TCAD demonstration
2D numerical TCAD simulations are used to infer the behavior of III-V capacitor-less
dynamic RAM (DRAM) cells. In particular, indium gallium arsenide on insulator technology is …
dynamic RAM (DRAM) cells. In particular, indium gallium arsenide on insulator technology is …
A monolithic 3D hybrid architecture for energy-efficient computation
The exponentially increasing performance of chip multiprocessors (CMPs) predicted by
Moore's Law is no longer due to the increasing clock rate of a single CPU core, but on …
Moore's Law is no longer due to the increasing clock rate of a single CPU core, but on …
Demonstration of 3-D SRAM cell by 3-D monolithic integration of InGaAs n-FinFETs on FDSOI CMOS with interlayer contacts
V Deshpande, H Hahn, E O'Connor… - … on Electron Devices, 2017 - ieeexplore.ieee.org
In this paper, we demonstrate, for the first time, 3-D Monolithic integration of short-channel
replacement metal gate InGaAs n-FinFETs on fully-depleted silicon-on-insulator CMOS, with …
replacement metal gate InGaAs n-FinFETs on fully-depleted silicon-on-insulator CMOS, with …
Physical mechanisms of mobility enhancement in ultrathin body GeOI pMOSFETs fabricated by hetero-layer-lift-off technology
WH Chang, T Irisawa, H Ishii, N Uchida… - IEEE Transactions on …, 2019 - ieeexplore.ieee.org
Advanced channel formation technologies called HEtero-layer-lift-off utilizing SiGe
heteroepitaxy have been realized for fabricating ultrathin body (UTB) Ge-on-insulator (GeOI) …
heteroepitaxy have been realized for fabricating ultrathin body (UTB) Ge-on-insulator (GeOI) …
Impact of Floating Body Effect, Back-Gate Traps, and Trap-Assisted Tunneling on Scaled In0.53Ga0.47As Ultrathin-Body MOSFETs and Mitigation Measures
Ultrathin-body (UTB) III-V channel MOSFETs are known to suffer from the floating body effect
which turns on a parasitic bipolar junction transistor (BJT) and increases the off-state …
which turns on a parasitic bipolar junction transistor (BJT) and increases the off-state …
High-performance InGaAs FinFETs with raised source/drain extensions
In this letter we report on high-performance InGaAs FinFETs with optimized on-off trade-off.
The InGaAs FinFETs are fabricated on silicon substrate using a CMOS-compatible …
The InGaAs FinFETs are fabricated on silicon substrate using a CMOS-compatible …