Toward large-scale access-transistor-free memristive crossbars

A Ghofrani, MA Lastras-Montano… - The 20th Asia and …, 2015 - ieeexplore.ieee.org
Memristive crossbars have been shown to be excellent candidates for building an ultra-
dense memory system because a per-cell access-transistor may no longer be necessary …

Functional test generation for hard-to-reach states using path constraint solving

Y Zhou, T Wang, H Li, T Lv, X Li - IEEE Transactions on …, 2015 - ieeexplore.ieee.org
Test generation for hard-to-reach states is important in functional verification. In this paper,
we present a path constraint solving-based test generation method (PACOST) which …

An instrumented observability coverage method for system validation

P Lisherness, KT Cheng - 2009 IEEE International High Level …, 2009 - ieeexplore.ieee.org
In order to improve effectiveness and efficiency of post-silicon validation, we present a fault-
symbol tracking method and a coverage metric that account for the limited observability in …

Bug analysis and corresponding error models in real designs

T Lv, T Xu, Y Zhao, H Li, X Li - 2007 IEEE International High …, 2007 - ieeexplore.ieee.org
This paper presents the item-missing error model. It stems from the analysis of real bugs that
are collected in two market-oriented projects:(1) the AMBA interface of a general-purpose …

Automatic selection of internal observation signals for design verification

T Lv, H Li, X Li - 2009 27th IEEE VLSI Test Symposium, 2009 - ieeexplore.ieee.org
As the design complexity increases dramatically, results of functional simulation are usually
checked through only a part of signals during design verification. It is important, therefore, to …

Improving validation coverage metrics to account for limited observability

P Lisherness, KT Cheng - 17th Asia and South Pacific Design …, 2012 - ieeexplore.ieee.org
In both pre-silicon and post-silicon validation, the detection of design errors requires both
stimulus capable of activating the errors and checkers capable of detecting the behavior as …

Path constraint solving based test generation for observability-enhanced branch coverage

Y Zhou, H Li, T Wang, B Liu, Y Gao… - 2016 IEEE 34th VLSI Test …, 2016 - ieeexplore.ieee.org
Traditional coverage metrics in verification focus on controllability without taking
observability into account, which may result in an artificially high coverage and a false sense …

[图书][B] Fault Simulation and Code Coverage Analysis of RTL Designs Using High-level Decision Diagrams

U Reinsalu - 2013 - digikogu.taltech.ee
This thesis addresses hardware testing issues as well as simulation-based hardware
verification issues applied at register-transfer and behavioral levels of design abstraction …

[PDF][PDF] Design Verification of an Embedded Processor: From Error Model to Test Method

T Lv, Y Zhao, H Li, X Li - researchgate.net
This paper presents a new error model for itemmissing bugs, which are paid little attention
by traditional error models. Such bugs do exist in practice, and are substantiated via our …

Adaptation of high level behavioral models for stuck-at coverage analysis

M Zolfy, Z Navabi - … Conference on Design and Technology of …, 2008 - ieeexplore.ieee.org
There has been increasing effort in the years for defining test strategies at the behavioral
level. Due to the lack of suitable coverage metrics and tools to assess the quality of a …