Expected failures in 3-D technology and related failure analysis challenges
After an introduction to 3-D technology, and through silicon via (TSV)-and stacking options,
this paper provides an overview of failures that can be expected in 3-D technology and lists …
this paper provides an overview of failures that can be expected in 3-D technology and lists …
Defect analysis using scanning acoustic microscopy for bonded microelectronic components with extended resolution and defect sensitivity
Ongoing trends in microelectronics aim at continuously increasing the integration rate and
complexity of microelectronic systems and devices. Novel integration technologies that arise …
complexity of microelectronic systems and devices. Novel integration technologies that arise …
Failure Analysis in Advanced Driver Assistance Systems
Y Li, H Shi - Advanced Driver Assistance Systems and Autonomous …, 2022 - Springer
Failure analysis (FA) could provide timely feedback to process optimization and solution
paths for system failures; thus, it is critical for the development of advanced driver assistance …
paths for system failures; thus, it is critical for the development of advanced driver assistance …
3-D technology: Failure analysis challenges
I De Wolf - EDFA Technical Articles, 2016 - dl.asminternational.org
Chip-level 3D integration, where chips are thinned, stacked, and vertically interconnected
using TSVs and microbumps, brings as many challenges as it does improvements …
using TSVs and microbumps, brings as many challenges as it does improvements …
Copper Through Silicon Vias Studied by Photo-elastic Scanning Infrared Microscopy
M Herms, M Wagner, I De Wolf - Microelectronics Reliability, 2016 - Elsevier
The in-plane stress distribution in copper through silicon vias (TSV) ensembles of different
design has been studied by the scanning infrared stress explorer (SIREX). SIREX is a …
design has been studied by the scanning infrared stress explorer (SIREX). SIREX is a …
A photo‐elastic microscopy study of the temperature dependency of stress induced by through silicon vias in silicon
M Herms, M Wagner, J De Messemaeker… - … status solidi c, 2017 - Wiley Online Library
SIREX (Scanning Infrared Stress Explorer) is a photo‐elastic microscope in this case
applied to characterize the temperature dependence of stress induced by copper Through …
applied to characterize the temperature dependence of stress induced by copper Through …
Recovering contacting interfaces in packaging and in semiconductor devices: Mechanisms and how to handle them in analysis
P Jacob, C Pecnik, G Nicoletti… - 2016 IEEE 23rd …, 2016 - ieeexplore.ieee.org
Several analysis cases reported contact problems on both device and packaged level.
However, they recovered upon the attempt to electrically verify them. Further analysis …
However, they recovered upon the attempt to electrically verify them. Further analysis …