LoBA: A leading one bit based imprecise multiplier for efficient image processing

B Garg, SK Patel, S Dutt - Journal of Electronic Testing, 2020 - Springer
Several applications such as signal processing, multimedia and big data analysis exhibit
computational error tolerance. This tolerance can be exploited to achieve efficient designs …

Reconfigurable rounding based approximate multiplier for energy efficient multimedia applications

B Garg, S Patel - Wireless Personal Communications, 2021 - Springer
The approximate design has emerged as a revolutionary design paradigm to obtain energy
efficient digital signal processing cores while exhibiting acceptable accuracy. In different …

Hardware efficient approximate multiplier architecture for image processing applications

S Chandaka, B Narayanam - Journal of Electronic Testing, 2022 - Springer
In this research paper, approximate multipliers are designed to reduce the computational
time and power delay product. However, there is a high possibility to further optimize the …

Efficient design of rounding-based approximate multiplier using modified Karatsuba algorithm

EJ Rao, KT Rao, KS Ramya, D Ajaykumar… - Journal of Electronic …, 2022 - Springer
Arithmetic operations play a substantial role in many applications, such as image
processing. In image processing applications, a multiplier is a predominantly used arithmetic …

A test pattern generation technique for approximate circuits based on an ILP-formulated pattern selection procedure

M Traiola, A Virazel, P Girard… - IEEE Transactions …, 2019 - ieeexplore.ieee.org
Intrinsic resiliency of many today's applications opens new design opportunities. Some
computation accuracy loss within the so-called resilient kernels does not affect the global …

Maximizing yield for approximate integrated circuits

M Traiola, A Virazel, P Girard… - … , Automation & Test …, 2020 - ieeexplore.ieee.org
Approximate Integrated Circuits (AxICs) have emerged in the last decade as an outcome of
Approximate Computing (AxC) paradigm. AxC focuses on efficiency of computing systems …

Maximizing yield through retesting of rejected circuits using approximation technique

SK Jena, S Biswas, JK Deka - 2020 IEEE REGION 10 …, 2020 - ieeexplore.ieee.org
The maximizing yield concept ensures a semi-conductor manufacturing structure towards
recognizing, diminishing, and avoiding yield-related defects and contamination. According …

An efficient accuracy reconfigurable CLA adder designs using complementary logic

SK Patel, B Garg, SK Rai - Journal of Electronic Testing, 2020 - Springer
High computational complexity of multimedia applications on the portable devices demands
a high speed and energy efficient processing cores. The performance of arithmetic unit …

[PDF][PDF] Design For Testability Method To Sequential Circuit

M RASHEED, T Rashid, M bin Hamzah, A Jaber… - Al-Salam Journal for …, 2023 - iasj.net
As the complexity of logic devices increased, it required more time and effort to manually
design and verify tests, it was difficult to estimate test coverage, and the tests ran too slowly …

Improved High speed approximate multiplier

T Roshini, RS Krishna, PK Reddy… - 2020 4th International …, 2020 - ieeexplore.ieee.org
Digital multiplication generally produces large complicated results due to its large inputs. As
the applications of digital multipliers are inherently error tolerable, approximate multipliers …