SPACX: Silicon photonics-based scalable chiplet accelerator for DNN inference

Y Li, A Louri, A Karanth - 2022 IEEE International Symposium …, 2022 - ieeexplore.ieee.org
In pursuit of higher inference accuracy, deep neural network (DNN) models have
significantly increased in complexity and size. To overcome the consequent computational …

SPRINT: A high-performance, energy-efficient, and scalable chiplet-based accelerator with photonic interconnects for CNN inference

Y Li, A Louri, A Karanth - IEEE Transactions on Parallel and …, 2021 - ieeexplore.ieee.org
Chiplet-based convolution neural network (CNN) accelerators have emerged as a promising
solution to provide substantial processing power and on-chip memory capacity for CNN …

Ascend: A scalable and energy-efficient deep neural network accelerator with photonic interconnects

Y Li, K Wang, H Zheng, A Louri… - IEEE Transactions on …, 2022 - ieeexplore.ieee.org
The complexity and size of recent deep neural network (DNN) models have increased
significantly in pursuit of high inference accuracy. Chiplet-based accelerator is considered a …

POPSTAR: A robust modular optical NoC architecture for chiplet-based 3D integrated systems

Y Thonnart, S Bernabé, J Charbonnier… - … , Automation & Test …, 2020 - ieeexplore.ieee.org
Silicon photonics technology is now gaining maturity with increasing levels of design
complexity from devices to large photonic integrated circuits. Close integration of control …

Scaling deep-learning inference with chiplet-based architecture and photonic interconnects

Y Li, A Louri, A Karanth - 2021 58th ACM/IEEE Design …, 2021 - ieeexplore.ieee.org
Chiplet-based architectures have been proposed to scale computing systems for deep
neural networks (DNNs). Prior work has shown that for the chiplet-based DNN accelerators …

Cross-layer co-optimization of network design and chiplet placement in 2.5-D systems

A Coskun, F Eris, A Joshi, AB Kahng… - … on Computer-Aided …, 2020 - ieeexplore.ieee.org
2.5-D integration technology is gaining attention and popularity in manycore computing
system design. 2.5-D systems integrate homogeneous or heterogeneous chiplets in a …

PACT: An extensible parallel thermal simulator for emerging integration and cooling technologies

Z Yuan, P Shukla, S Chetoui… - … on Computer-Aided …, 2021 - ieeexplore.ieee.org
Thermal analysis is an essential step that enables co-design of the computing system (ie,
integrated circuits and computer architectures) with the cooling system (eg, heat sink) …

PROWAVES: Proactive runtime wavelength selection for energy-efficient photonic NoCs

A Narayan, Y Thonnart, P Vivet… - IEEE Transactions on …, 2020 - ieeexplore.ieee.org
2.5-D manycore systems running parallel applications are severely bottlenecked by network-
on-chip (NoC) latencies and bandwidth. Traditionally, NoCs are composed of electrical links …

ReSiPI: A reconfigurable silicon-photonic 2.5 D chiplet network with PCMs for energy-efficient interposer communication

E Taheri, S Pasricha, M Nikdast - Proceedings of the 41st IEEE/ACM …, 2022 - dl.acm.org
2.5 D chiplet systems have been proposed to improve the low manufacturing yield of large-
scale chips. However, connecting the chiplets through an electronic interposer imposes a …

Hardware Acceleration for Knowledge Graph Processing: Challenges & Recent Developments

M Besta, R Gerstenberger, P Iff, P Sonawane… - arXiv preprint arXiv …, 2024 - arxiv.org
Knowledge graphs (KGs) have achieved significant attention in recent years, particularly in
the area of the Semantic Web as well as gaining popularity in other application domains …