Hunting suicide notes in web 2.0-preliminary findings

YP Huang, T Goh, CL Liew - Ninth IEEE international …, 2007 - ieeexplore.ieee.org
Blogs provide an outlet for youth to explore and share their emotions with the world. By
exploring the possibilities of mining the vast repositories of social networking sites, we hope …

A 4-GHz effective sample rate integrated test core for analog and mixed-signal circuits

MM Hafed, N Abaskharoun… - IEEE Journal of Solid …, 2002 - ieeexplore.ieee.org
An area-efficient and robust integrated test core for mixed-signal circuits is described. The
core consists of a completely digital implementation, except for a simple reconstruction filter …

On-chip noise sensor for integrated circuit susceptibility investigations

S Dhia, A Boyer, B Vrignon… - IEEE transactions on …, 2011 - ieeexplore.ieee.org
With the growing concerns about electromagnetic compatibility of integrated circuits, the
need for accurate prediction tools and models to reduce risks of noncompliance becomes …

Characterization and modeling of parasitic emission in deep submicron CMOS

B Vrignon, SD Bendhia, E Lamoureux… - IEEE Transactions on …, 2005 - ieeexplore.ieee.org
This paper presents a study of the parasitic emissions of a 0.18-/spl mu/m CMOS
experimental integrated circuit (IC) and an accurate method for modeling the internal current …

A stand-alone integrated test core for time and frequency domain measurements

M Hafed, N Abaskharoun… - … Test Conference 2001 …, 2001 - ieeexplore.ieee.org
An area efficient and robust integrated test core for mixed-signal circuits is described. The
core consists of a completely digital implementation, except for a simple reconstruction filter …

Embedded time domain analyzer for high speed circuits

GW Roberts, M Safi-Harab, M Oulmane - US Patent 7,474,974, 2009 - Google Patents
A method of providing an on-chip high-speed time domain digital analyzer for the
characterization and analysis of signals within an integrated circuit is provided. The method …

70-GHz effective sampling time-base on-chip oscilloscope in CMOS

M Safi-Harb, GW Roberts - IEEE Journal of Solid-State Circuits, 2007 - ieeexplore.ieee.org
This paper examines a time-base measurement system for on-chip digitization.
Undersampling, combined with single-path time-domain amplification and processing, is …

A new method for measuring signal integrity in CMOS ICs

S Delmas‐Bendhia, F Caignet, E Sicard - Microelectronics …, 2000 - emerald.com
The aim of this paper is to present a new and original method for on‐chip measurements of
very high frequency parasitic signals where a sampling circuit is directly included in the test …

A unified detection scheme for crosstalk effects in interconnection bus

KSM Li, CL Lee, C Su, JE Chen - IEEE transactions on very …, 2009 - ieeexplore.ieee.org
For very deep sub-micrometer VLSI, crosstalk becomes an important issue in affecting
performance and signal integrity of the circuits. Two crosstalk fault effects, namely, glitch and …

[图书][B] Plasma etching processes for interconnect realization in VLSI

N Posseme - 2015 - books.google.com
This is the first of two books presenting the challenges and future prospects of plasma
etching processes for microelectronics, reviewing the past, present and future issues of …