Large-scale datacenters (DCs) host tens of thousands of diverse applications each day.
However, interference between colocated workloads and the difficulty to match applications …

Architectural simulation is time-consuming, and the trend towards hundreds of cores is
making sequential simulation even slower. Existing parallel simulation techniques either …

Until very recently, microprocessor designs were computation-centric. On-chip
communication was frequently ignored. This was because of fast, single-cycle on-chip …

Performance isolation is a key challenge in cloud computing. Unfortunately, Linux has few
defenses against performance interference in shared resources such as processor caches …

We describe the design and implementation of DeepDive, a system for transparently
identifying and managing performance interference between virtual machines (VMs) co …

Assessing the performance of multiprogram workloads running on multithreaded hardware
is difficult because it involves a balance between single-program performance and overall …

Chip-multiprocessors (CMPs) must often execute workload mixes with different performance
requirements. On one hand, user-facing, latency-critical applications (eg, web search) need …

This paper presents CMP Cooperative Caching, a unified framework to manage a CMP's
aggregate on-chip cache resources. Cooperative caching combines the strengths of private …

The ever-increasing importance of main memory latency and bandwidth is pushing CMPs
towards caches with higher capacity and associativity. Associativity is typically improved by …

Computer architecture simulation tools are essential for implementing and evaluating new
ideas in the domain and can be useful for understanding the behavior of programs and …