Recent trends in deep learning (DL) imposed hardware accelerators as the most viable
solution for several classes of high-performance computing (HPC) applications such as …

We propose the Sparse Abstract Machine (SAM), an abstract machine model for targeting
sparse tensor algebra to reconfigurable and fixed-function spatial dataflow accelerators …

Sparse tensor algorithms are becoming widespread, particularly in the domains of deep
learning, graph and data analytics, and scientific computing. Current high-performance …

With the slowing of Moore's law, computer architects have turned to domain-specific
hardware specialization to continue improving the performance and efficiency of computing …

Domain-specific languages for hardware can significantly enhance designer productivity,
but sometimes at the cost of ease of verification. On the other hand, ISA specification …

The growing interest in novel dataflow architectures and streaming execution paradigms has
created the need for a simulator optimized for modeling dataflow systems. To fill this need …

Hardware specialization is commonly viewed as a way to scale performance in the dark
silicon era with modern-day SoCs featuring multiple tens of dedicated accelerators. By only …

We present domain adaptive processor (), a programmable systolic-array processor
designed for wireless communication and linear algebra workloads. uses a globally …

Open Modification Search (OMS) is a promising algorithm for mass spectrometry analysis
that enables the discovery of modified peptides. However, OMS encounters challenges as it …

The architecture of a coarse-grained reconfigurable array (CGRA) interconnect has a
significant effect on not only the flexibility of the resulting accelerator, but also its power …