Analog designs consist of multiple hierarchical functional blocks. Each block can be built
using one of several design topologies, where the choice of topology is based on circuit …

Process variations and the effect of interconnect parasitics can cause significant
perturbations in the performance metrics of capacitive digital-to-analog converters (DACs) …

The accuracy and linearity of capacitive digital-to-analog converters (DACs) depend on
precise capacitor ratios, but these ratios are perturbed by process variations and parasitics …

The layout area and power consumption of a charge-scaling digital-to-analog converter
(DAC) is typically dominated by the capacitor array. For a binary-weighted DAC, since the …

In analog circuits, process variation can cause unpredictability in circuit performance.
Common-centroid (CC) type layouts have been shown to mitigate process-induced …

The design of active array structures in analog circuits requires careful matching to minimize
the impact of variations. This work presents a constructive approach for building these arrays …

Building upon recent advances in analog electronic design automation (EDA), this paper
discusses directions for reinforcing the connection between design and EDA, in order to …

Analog placement is a crucial phase in analog integrated circuit synthesis, impacting the
quality and performance of the final circuits. This process involves determining the physical …

The ALIGN (Analog Layout, Intelligently Generated from Netlists) project [1, 2] is a joint
university-industry effort to push the envelope of automated analog layout through a …

Since memory is a storage component, it is the brain of the microprocessor and system on a
chip. One of the important circuits in memory is the sense amplifier (SA), which is only active …