A Hammerstein–Wiener model for single-electron transistors

B dos Santos Pês, E Oroski… - … on Electron Devices, 2018 - ieeexplore.ieee.org
This paper proposes a new dynamic behavior model for single-electron transistors (SETs). A
comprehensive review of modeling techniques and previous models was carried out aiming …

A modified macro model approach for SPICE based simulation of single electron transistor

A Ghosh, A Jain, NB Singh, SK Sarkar - Journal of Computational …, 2016 - Springer
A new macro model of single electron transistor (SET) for SPICE based simulation of SET
circuits is proposed. Two voltage controlled current sources and some scaling factors are …

A new SPICE macro model of single electron transistor for efficient simulation of single-electronics circuits

A Jain, A Ghosh, NB Singh, SK Sarkar - Analog Integrated Circuits and …, 2015 - Springer
To explore single-electron circuits for different applications, a proper simulation platform
where circuits consisting of single electron transistors and other devices can be simulated …

A new static differential design style for hybrid SET–CMOS logic circuits

MM Abutaleb - Journal of Computational Electronics, 2015 - Springer
Single electron transistors (SETs) have ultra-small size, ultra-low power dissipation and
unique Coulomb blockade oscillation characteristics which make them promising …

Design and Testing of Digital Logic Gates Using HCS Macro-Model

SC Kolay, M Bandyopadhyay… - IEEE Transactions on …, 2022 - ieeexplore.ieee.org
Single Electron Transistor (SET) has become very popular in industry as well as in
academia. As SET can control the tunneling of electrons one by one through the channel so …

Stability and reliability analysis of hybrid CMOS-SET circuits—a new approach

A Jain, A Ghosh, NB Singh… - Journal of Computational …, 2014 - ingentaconnect.com
A new approach for stability and reliability analysis of hybrid CMOS-SET circuits has been
proposed. Using this approach, the stability of hybrid SET-CMOS NAND and NOR gates has …

[HTML][HTML] Hybrid simulation method of quantum characteristics for advanced Si MOSFETs under extreme conditions by incorporating simplified master equation with …

X Zhu, H Yin - Results in Physics, 2024 - Elsevier
Abstract Silicon (Si)-based quantum-dot (QD) device by advanced CMOS process is one of
important technologies for quantum computing application and currently, it needs a fast and …

[HTML][HTML] Simulation of silicon quantum dots with diamond-channel by simplified ME model

X Zhu, J Gu, H Yin, Z Wu - Results in Physics, 2022 - Elsevier
Developing novel silicon quantum dots (Si-QDs) on conventional CMOS process is one of
the most important technologies in Si quantum computing to realize multi-bit integration with …

Design and analysis of low power 8-bit ALU on reversible logic for nanoprocessors

TM Amirthalakshmi, SS Raja - Journal of Ambient Intelligence and …, 2018 - Springer
A low power reversible 8-bit ALU using single electron transistor (SET) for Nano processors
is designed in this paper. Since there is a possibility in reversible logic to build circuits from …

Design and performance analysis of reversible logic based ALU using hybrid single electron transistor

B Jana, A Jana, S Basak, JK Sing… - 2014 Recent Advances …, 2014 - ieeexplore.ieee.org
The Co-integration of SET (Single Electron Transistor) and CMOS is the new evolution for
the stunning growth in modern semiconductor industry. In the present work we have …