Analog circuit topology synthesis by means of evolutionary computation

Ž Rojec, Á Bűrmen, I Fajfar - Engineering Applications of Artificial …, 2019 - Elsevier
Designing an analog electrical circuit requires substantial effort and time by a highly-skilled
designer. Many tools have been devised to aid engineers in the design procedure, from …

A novel algorithm for determining the structure of digital predistortion models

S Wang, M Abi Hussein, O Venard… - IEEE Transactions on …, 2018 - ieeexplore.ieee.org
The generalized memory polynomial (GMP) model is one of the most commonly used
models in digital predistortion to compensate for the nonlinearities and memory effects of …

Applications of evolutionary algorithms in the design automation of analog integrated circuits

GR Salgado, CA Reyes-Garcia - J. Appl. Sci, 2010 - inaoe.repositorioinstitucional.mx
During the last decade, evolutionary algorithms (EAs) have shown its usefulness for solving
multi-objective optimization problems. In the field of analog Integrated Circuits (ICs), they …

An LDE-Aware gm/ID-Based Hybrid Sizing Method for Analog Integrated Circuits

T Liao, L Zhang - … Transactions on Computer-Aided Design of …, 2020 - ieeexplore.ieee.org
Layout-dependent effects (LDEs) have become increasingly more important in the synthesis
of analog integrated circuits. In this article, a two-phase hybrid sizing method for high …

[图书][B] Integrated circuits for analog signal processing

E Tlelo-Cuautle - 2012 - books.google.com
This book presents theory, design methods and novel applications for integrated circuits for
analog signal processing. The discussion covers a wide variety of active devices, active …

Layout-dependent effects aware gm/iD-based many-objective sizing optimization for analog integrated circuits

T Liao, L Zhang - … IEEE International Symposium on Circuits and …, 2018 - ieeexplore.ieee.org
Layout-dependent effects (LDEs) as one type of second-order effects in addition to
parasitics, the primary second-order effect, are considered in our proposed two-stage hybrid …

Efficient parasitic-aware hybrid sizing methodology for analog and RF integrated circuits

T Liao, L Zhang - Integration, 2018 - Elsevier
In this paper, a highly efficient parasitic-aware hybrid sizing methodology is proposed. It
involves geometric programming (GP) as the first phase, both single-objective and many …

Parasitic-aware gm/ID-based many-objective analog/RF circuit sizing

T Liao, L Zhang - 2018 19th International Symposium on …, 2018 - ieeexplore.ieee.org
Accurate parasitic consideration in analog/RF circuit synthesis becomes more essential
since layout-dependent effects become more influential in the advanced technologies. In …

Efficient Parasitic-aware gm/ID-based Hybrid Sizing Methodology for Analog and RF Integrated Circuits

T Liao, L Zhang - ACM Transactions on Design Automation of Electronic …, 2020 - dl.acm.org
As the primary second-order effect, parasitic issues have to be seriously addressed when
synthesizing high-performance analog and RF integrated circuits (ICs). In this article, a two …

A multi-objective simulation based tool: application to the design of high performance lc-vcos

A Sallem, P Pereira, M Fakhfakh, H Fino - … for the Internet of Things: 4th …, 2013 - Springer
The continuing size reduction of electronic devices imposes design challenges to optimize
the performances of modern electronic systems, such as: wireless services, telecom and …