De-embedding transmission line measurements for accurate modeling of IC designs

AM Mangan, SP Voinigescu, MT Yang… - IEEE transactions on …, 2006 - ieeexplore.ieee.org
A new technique to de-embed the contributions of parasitic structures from transmission line
measurements is presented and applied to microstrip lines fabricated in 90-and 130-nm RF …

The challenge of signal integrity in deep-submicrometer CMOS technology

F Caignet, S Delmas-Bendhia… - Proceedings of the …, 2001 - ieeexplore.ieee.org
Advances in interconnect technologies, such as the increase in the number of metal layers,
stacked vias, and the reduced routing pitch, have played a key role to continuously improve …

A new approach for SOI devices small-signal parameters extraction

A Bracale, V Ferlet-Cavrois, N Fel, D Pasquet… - … Integrated Circuits and …, 2000 - Springer
SOI devices are frequently used nowadays in the RF and HF field. Design of complex SOI
integrated circuits involves a prior detailed analog simulation, that can only be performed …

Capacitively loaded inverted CPWs for distributed TRL-based de-embedding at (sub) mm-waves

L Galatro, A Pawlak, M Schroter… - IEEE Transactions on …, 2017 - ieeexplore.ieee.org
In this paper, we present a thru-reflect-line (TRL) calibration/de-embedding kit integrated in
the back-end-of-line of a SiGe technology, which allows direct calibration at the first …

Effective resistivity extraction of low-loss silicon substrates at millimeter-wave frequencies

L Nyssens, M Rack, JP Raskin - International Journal of Microwave …, 2020 - cambridge.org
The effective resistivity (ρeff) is a figure of merit commonly used to assess the radio-
frequency performance of a substrate from the measurements of coplanar waveguide lines …

Comparison of on-wafer multiline TRL and LRM+ calibrations for RF CMOS applications

A Rumiantsev, SL Sweeney… - 2008 72nd ARFTG …, 2008 - ieeexplore.ieee.org
This paper presents a quantitative comparison of the reference multiline TRL and LRM+ for
a customized set of standards in a CMOS process using IBM's 0.13 mum technology. This …

[PDF][PDF] Characteristic-impedance measurement error on lossy substrates

DF Williams, U Arz, H Grabinski - IEEE Microwave and Wireless …, 2001 - tsapps.nist.gov
Characteristic-Impedance Measurement Error on Lossy Substrates Page 1 Publication of the
National Institute of Standards and Technology, not subject to copyright. This work was …

Millimeter-wave on-wafer TRL calibration employing 3-D EM simulation-based characteristic impedance extraction

L Galatro, M Spirito - IEEE Transactions on Microwave Theory …, 2017 - ieeexplore.ieee.org
In this paper, we propose a method based on 3-D electromagnetic simulations, for the
characteristic impedance extraction of transmission lines employed in TRL calibration …

S-parameter deembedding algorithm and its application to substrate integrated waveguide lumped circuit model extraction

F Fesharaki, T Djerafi, M Chaker… - IEEE Transactions on …, 2017 - ieeexplore.ieee.org
In this paper, a unified method is introduced and formulated for deriving the equivalent
circuit model of a guided wave structure as well as its characteristic impedance for any …

Hybrid method for frequency-dependent lossy coupled transmission line characterization and modeling

JH Kim, DH Han - … of Electrical Packaging (IEEE Cat. No …, 2003 - ieeexplore.ieee.org
This paper presents a hybrid method that combines measurements, electromagnetic (EM)
numerical tools, and extrapolation techniques for accurate modeling of lossy multi …