Pattern-based synthesis has drawn wide interest from researchers who tried to utilize the
regularity in applications for design optimizations. In this paper we present a general pattern …

The problem of mapping a data flow graph onto a reconfigurable architecture has been
difficult to solve quickly and optimally. Anytime algorithms have the potential to meet both …

Presently, architecture description languages (ADLs) are widely used to raise the
abstraction level of the design space exploration of application specific instruction-set …

A new approach for the translation of SDL specifications to a mixed hardware/software
system is presented. Based on the computational model of communicating extended finite …

This paper presents a new approach on combined highlevel synthesis and partitioning for
FPGA-based multi-chip emulation systems. The goal is to synthesize a prototype with …

Current rapid synthesis approaches for reusable dedicated hardware components (cores)
for digital signal processing systems are ineffective since they fail to capture and exploit the …

This paper presents a new dataflow graph based approach for modelling, rapidly
implementing, and performing high level optimization of embedded systems including …

This paper presents a new approach to cross-level hierarchical high-level synthesis. A
methodology is presented, that supports the efficient synthesis of hierarchical specified …

In embedded data-dominated applications, a global system-level data transfer and storage
exploration phase is crucial in obtaining a cost-and performance-efficient solution. We have …

While application-specific instruction-set processors (ASIPs) have allowed designers to
create processors with custom instructions to target specific applications, floating-point (FP) …