Three-dimensional memory device with discrete self-aligned charge storage elements and method of making thereof

M Tsutsumi, K Kajiwara, RS Makala - US Patent 9,991,277, 2018 - Google Patents
A memory opening can be formed through an alternating stack of insulating layers and
sacrificial material layers over a substrate. A material layer stack containing, from outside to …

Capacitive-coupled non-volatile thin-film transistor NOR strings in three-dimensional arrays

E Harari - US Patent 10,121,553, 2018 - Google Patents
Multi-gate NOR flash thin-film transistor (TFT) string arrays are organized as three
dimensional stacks of active strips. Each active strip includes a shared source sublayer and …

Three-dimensional vertical NOR flash thin film transistor strings

E Harari - US Patent 9,842,651, 2017 - Google Patents
(57) ABSTRACT A memory structure, includes (a) active columns of poly silicon formed
above a semiconductor substrate, each active column extending vertically from the substrate …

Reverse memory cell

E Harari, G Samachisa, Y Fong - US Patent 10,896,916, 2021 - Google Patents
(57) ABSTRACT A non-volatile “reverse memory cell” suitable for use as a building block for
a 3-dimensional memory array includes a charge-trapping layer which is programmed or …

Three-dimensional memory device containing bonded memory die and peripheral logic die and method of making thereof

A Nishida - US Patent 10,283,493, 2019 - Google Patents
A first die includes a three-dimensional memory device and first copper pads. A second die
includes a peripheral logic circuitry containing CMOS devices located on the semiconductor …

Three-dimensional memory device having support-die-assisted source power distribution and method of making thereof

KH Kim, M Higashitani, F Toyama… - US Patent 10,510,738, 2019 - Google Patents
2019-01-15 Assigned to SANDISK TECHNOLOGIES LLC reassignment SANDISK
TECHNOLOGIES LLC ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR …

Single-semiconductor-layer channel in a memory opening for a three-dimensional non-volatile memory device

P Rabkin, J Pachamuthu, J Alsmeier - US Patent 9,230,980, 2016 - Google Patents
A memory film layer is formed in a memory opening through an alternating stack of first
material layers and second material layers. A sacrificial material layer is deposited on the …

Multilevel memory stack structure and methods of manufacturing the same

J Pachamuthu, J Alsmeier, H Chien - US Patent 9,230,987, 2016 - Google Patents
US9230987B2 - Multilevel memory stack structure and methods of manufacturing the same
- Google Patents US9230987B2 - Multilevel memory stack structure and methods of …

Methods of fabricating a three-dimensional non-volatile memory device

J Pachamuthu, J Alsmeier, RS Makala… - US Patent 9,230,973, 2016 - Google Patents
(57) ABSTRACT A method of fabricating a semiconductor device, such as a three-
dimensional NAND memory string, includes forming a first stack of alternating layers of a first …

Vertical NAND and method of making thereof using sequential stack etching and self-aligned landing pad

J Liu, Y Zhang, M Chowdhury, RS Makala… - US Patent …, 2017 - Google Patents
2016-03-24 Assigned to SANDISK TECHNOLOGIES INC. reassignment SANDISK
TECHNOLOGIES INC. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR …