[HTML][HTML] Applications and techniques for fast machine learning in science

AMC Deiana, N Tran, J Agar, M Blott… - Frontiers in big …, 2022 - frontiersin.org
In this community review report, we discuss applications and techniques for fast machine
learning (ML) in science—the concept of integrating powerful ML methods into the real-time …

Melia: A mapreduce framework on opencl-based fpgas

Z Wang, S Zhang, B He, W Zhang - IEEE Transactions on …, 2016 - ieeexplore.ieee.org
MapReduce, originally developed by Google for search applications, has recently become a
popular programming framework for parallel and distributed environments. This paper …

Sparkcl: A unified programming framework for accelerators on heterogeneous clusters

O Segal, P Colangelo, N Nasiri, Z Qian… - arXiv preprint arXiv …, 2015 - arxiv.org
We introduce SparkCL, an open source unified programming framework based on Java,
OpenCL and the Apache Spark framework. The motivation behind this work is to bring …

Acceleration of k-means algorithm using altera sdk for opencl

QY Tang, MAS Khalid - ACM Transactions on Reconfigurable …, 2016 - dl.acm.org
A K-means clustering algorithm involves partitioning of data iteratively into k clusters. It is
one of the most popular data-mining algorithms [Wu et al. 2007], and is widely used in other …

Transparent compiler and runtime specializations for accelerating managed languages on fpgas

M Papadimitriou, J Fumero, A Stratikopoulos… - arXiv preprint arXiv …, 2020 - arxiv.org
In recent years, heterogeneous computing has emerged as the vital way to increase
computers? performance and energy efficiency by combining diverse hardware devices …

TANGO: Transparent heterogeneous hardware Architecture deployment for eNergy Gain in Operation

K Djemame, D Armstrong, R Kavanagh… - arXiv preprint arXiv …, 2016 - arxiv.org
The paper is concerned with the issue of how software systems actually use Heterogeneous
Parallel Architectures (HPAs), with the goal of optimizing power consumption on these …

A coarse-grained reconfigurable architecture for compute-intensive MapReduce acceleration

S Liang, S Yin, L Liu, Y Guo… - IEEE Computer …, 2015 - ieeexplore.ieee.org
Large-scale workloads often show parallelism of different levels. which offers acceleration
potential for clusters and parallel processors. Although processors such as GPGPUs and …

Aparapi-UCores: A high level programming framework for unconventional cores

O Segal, P Colangelo, N Nasiri, Z Qian… - 2015 IEEE high …, 2015 - ieeexplore.ieee.org
Combining several types of devices and architectures is at the heart of heterogeneous
computing's power efficiency advantage, but the strength of heterogeneous systems is also …

Running parallel bytecode interpreters on heterogeneous hardware

J Fumero, A Stratikopoulos, C Kotselidis - Companion Proceedings of …, 2020 - dl.acm.org
Since the early conception of managed runtime systems with tiered JIT compilation, several
research attempts have been made to accelerate the bytecode execution. In this paper, we …

FPGA Based Acceleration of Matrix Decomposition and Clustering Algorithm Using High Level Synthesis

QY Tang - 2016 - search.proquest.com
FPGAs have shown great promise for accelerating computationally intensive algorithms.
However, FPGA-based accelerator design is tedious and time consuming if we rely on …