[图书][B] Electronic design automation: synthesis, verification, and test

LT Wang, YW Chang, KTT Cheng - 2009 - books.google.com
This book provides broad and comprehensive coverage of the entire EDA flow. EDA/VLSI
practitioners and researchers in need of fluency in an" adjacent" field will find this an …

[PDF][PDF] Improving characteristics of LUT-based Mealy FSMs

A Barkalov, L Titarenko… - International Journal of …, 2020 - intapi.sciendo.com
Practically, any digital system includes sequential blocks represented using a model of finite
state machine (FSM). It is very important to improve such FSM characteristics as the number …

EffiSyn: Efficient Logic Synthesis with Dynamic Scoring and Pruning

X Li, L Chen, J Zhang, S Wen, W Sheng… - 2023 IEEE/ACM …, 2023 - ieeexplore.ieee.org
Logic synthesis tools synthesize circuit structures to optimize specific targets given
reasonable constraints and runtime using a set of well-defined operators. The efficiency of …

HIMap: a heuristic and iterative logic synthesis approach

X Li, L Chen, F Yang, M Yuan, H Yan… - Proceedings of the 59th …, 2022 - dl.acm.org
Recently, many models show their superiority in sequence and parameter tuning. However,
they usually generate non-deterministic flows and require lots of training data. We thus …

Scalable exploration of functional dependency by interpolation and incremental SAT solving

CC Lee, JHR Jiang, CY Huang… - 2007 IEEE/ACM …, 2007 - ieeexplore.ieee.org
Functional dependency is concerned with rewriting a Boolean function f as a function h over
a set of base functions {g 1,..., gn), ie f= h (g 1,..., gn). It plays an important role in many …

Boolean factoring and decomposition of logic networks

A Mishchenko, R Brayton… - 2008 IEEE/ACM …, 2008 - ieeexplore.ieee.org
This paper presents new methods for restructuring logic networks based on fast Boolean
techniques. The basis for these are 1) a cut-based view of a logic network, 2) exploiting the …

Support-reducing decomposition for FPGA mapping

L Machado, J Cortadella - IEEE Transactions on Computer …, 2018 - ieeexplore.ieee.org
Decomposition is a technology-independent process, in which a large complex function is
broken into smaller, less complex functions. The costs of two-level or factored-form …

Logic synthesis in a nutshell

JHR Jiang, S Devadas - Electronic Design Automation, 2009 - Elsevier
Publisher Summary Logic synthesis is the process of automatic production of logic
components, in particular digital circuits. It is a subject about how to abstract and represent …

Boolean satisfiability-based routing and its application to xilinx ultrascale clock network

H Fraisse, A Joshi, D Gaitonde, A Kaviani - Proceedings of the 2016 …, 2016 - dl.acm.org
Boolean Satisfiability (SAT)-based routing offers a unique advantage over conventional
routing algorithms by providing an exhaustive approach to find a solution. Despite that …

Small formulas for large programs: On-line constraint simplification in scalable static analysis

I Dillig, T Dillig, A Aiken - International Static Analysis Symposium, 2010 - Springer
Static analysis techniques that represent program states as formulas typically generate a
large number of redundant formulas that are incrementally constructed from previous …