LTRF: Enabling high-capacity register files for GPUs via hardware/software cooperative register prefetching

M Sadrosadati, A Mirhosseini, SB Ehsani… - ACM SIGPLAN …, 2018 - dl.acm.org
Graphics Processing Units (GPUs) employ large register files to accommodate all active
threads and accelerate context switching. Unfortunately, register files are a scalability …

Morpheus: Extending the last level cache capacity in GPU systems using idle GPU core resources

S Darabi, M Sadrosadati, N Akbarzadeh… - 2022 55th IEEE/ACM …, 2022 - ieeexplore.ieee.org
Graphics Processing Units (GPUs) are widely-used accelerators for data-parallel
applications. In many GPU applications, GPU memory bandwidth bottlenecks performance …

Cache-emulated register file: An integrated on-chip memory architecture for high performance GPGPUs

N Jing, J Wang, F Fan, W Yu, L Jiang… - 2016 49th Annual …, 2016 - ieeexplore.ieee.org
The on-chip memory design is critical to the GPGPU performance because it serves
between the massive threads and the huge external memory as a low-latency and high …

Particle swarm optimization protocol for clustering in wireless sensor networks: A realistic approach

RS Elhabyan, MCE Yagoub - Proceedings of the 2014 IEEE …, 2014 - ieeexplore.ieee.org
In Wireless Sensor Network (WSN), Clustering sensor nodes is an efficient topology control
method to reduce energy consumption of the sensor nodes. Many link quality-based …

Architectural techniques for improving the power consumption of noc-based cmps: A case study of cache and network layer

E Ofori-Attah, W Bhebhe… - Journal of Low Power …, 2017 - mdpi.com
The disparity between memory and CPU have been ameliorated by the introduction of
Network-on-Chip-based Chip-Multiprocessors (NoC-based CMPS). However, power …

Opportunistic refreshing algorithm for eDRAM memories

A Kazimirsky, S Wimer - … Transactions on Circuits and Systems I …, 2016 - ieeexplore.ieee.org
Embedded DRAM (eDRAM) is an alternative technology that can replace the area and
power consumed by SRAM cache memories. eDRAM consumes half the area and an order …

Highly concurrent latency-tolerant register files for GPUs

M Sadrosadati, A Mirhosseini, A Hajiabadi… - ACM Transactions on …, 2021 - dl.acm.org
Graphics Processing Units (GPUs) employ large register files to accommodate all active
threads and accelerate context switching. Unfortunately, register files are a scalability …

A Lightweight, Compiler-Assisted Register File Cache for GPGPU

MA Shoushtary, JM Arnau, JT Murgadas… - arXiv preprint arXiv …, 2023 - arxiv.org
Modern GPUs require an enormous register file (RF) to store the context of thousands of
active threads. It consumes considerable energy and contains multiple large banks to …

Refresh algorithm for ensuring 100% memory availability in gain-cell embedded DRAM macros

R Golman, N Nachum, T Cohen, R Giterman… - IEEE …, 2021 - ieeexplore.ieee.org
Gain-cell embedded DRAM (GC-eDRAM) is a dense, low power option for embedded
memory implementation, supporting low supply voltages; however, it suffers from limited …

Energy Efficient Lightweight Scheme to Identify Selective Forwarding Attack on Wireless Sensor Networks

M Jawarneh, M Jayakrishna, SK Davuluri… - … on Intelligent Computing …, 2023 - Springer
To protect wireless sensor networks from selective forwarding attacks, a lightweight WSN
selective forwarding attack detection technique (LSFAD) is presented. The proposed …