Embodiments describe high aspect ratio and fine pitch interconnects for a semiconductor
package, such as a package-on-package structure. In an embodiment, the interconnects are …

Embodiments include an electronics package and methods of forming such packages. In an
embodiment, the electronics package comprises a first package substrate. In an …

Embodiments describe high aspect ratio and fine pitch interconnects for a semiconductor
package, such as a pack age-on-package structure. In an embodiment, the intercon nects …

A package on packaging structure provides for improved thermal conduction and
mechanical strength by the introduction of a sold thermal coupler between the first and …

Embodiments describe a semiconductor package that includes a Substrate, a die bonded to
the Substrate, and a solder paste overmold layer formed over a top surface of the die. In an …

Thermal heat spreaders and/or an IC die with solderable thermal structures may be
assembled together with a solder array thermal interconnects. A thermal heat spreader may …

Provided are a thermal interface material layer and a pack age-on-package device including
the same. The package on-package device may include a thermal interface material layer …

US11502072B2 - Integrated circuit package and method - Google Patents US11502072B2 -
Integrated circuit package and method - Google Patents Integrated circuit package and …

(54) METHOD FOR FORMING INTERPOSERS HOIL 25/03 (2013.01); HOIL 2224/I 1822
AND STACKED MEMORY DEVICES(2013.01); HOIL 2224/131 (2013.01); HOIL 2224/133 …

In one embodiment, a semiconductor package includes a circuit Substrate, a plurality of
semiconductor chips stacked on the circuit Substrate, insulating adhesive patterns inter …