In highly-pipelined machines, instructions and data are prefetched and buffered in both the
processor and the cache. This is done to reduce the average memory access latency and to …

Designing efficient algorithms for parallel computers | Guide books skip to main content ACM
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In this work we review the present status of numerical methods for partial differential
equations on vector and parallel computers. A discussion of the relevant aspects of these …

More and more scientists and engineers are becoming interested in using supercomputers.
Earlier barriers to using these machines are disappearing as software for their use improves …

A new class of modular networks is proposed for hierarchically constructing massively
parallel computer systems for distributed supercomputing and AI applications. These …

The quantitative evaluation of computer performance is needed during the entire life cycle of
a computer system. We survey the major quantitative methods used in computer …

Scheduling in the context of parallel systems is often thought of in terms of assigning tasks in
a program to processors, so as to minimize the makespan. This formulation assumes that the …

The presence of high-performance mechanisms in shared-memory multiprocessors such as
private caches, the extensive pipelining of memory access, and combining networks may …

Experimentation aimed at determining the potential benefit of mixed-mode SIMD/MIMD
parallel architectures is reported. The experimentation is based on timing measurements …

To increase speed and reliability of operation, multiple computers are replacing
uniprocessors and wired-logic controllers in modern robots and industrial control systems …