Augmented real-valued time-delay neural network for compensation of distortions and impairments in wireless transmitters

D Wang, M Aziz, M Helaoui… - IEEE Transactions on …, 2018 - ieeexplore.ieee.org
A digital predistorter, modeled by an augmented real-valued time-delay neural network
(ARVTDNN), has been proposed and found suitable to mitigate the nonlinear distortions of …

A simplified transistor-based analog predistorter for a GaN power amplifier

Q Cai, W Che, K Ma, M Zhang - IEEE Transactions on Circuits …, 2017 - ieeexplore.ieee.org
A simplified transistor-based analog predistorter (APD) is proposed and used to linearize a
GaN power amplifier (PA). The proposed APD features simple circuit topology because no …

A digital predistortion system with extended correction bandwidth with application to LTE-A nonlinear power amplifiers

O Hammi, A Kwan, S Bensmida… - … on Circuits and …, 2014 - ieeexplore.ieee.org
This article presents a bandwidth extended digital predistortion system suitable for LTE-
advanced applications. The proposed predistortion system uses a two-box architecture …

A quadratic-interpolated LUT-based digital predistortion technique for cellular power amplifiers

KF Liang, JH Chen, YJE Chen - IEEE Transactions on Circuits …, 2014 - ieeexplore.ieee.org
Baseband digital predistortion (DPD) is an efficient and low-cost method for linearizing a
power amplifier (PA) in a wireless system using a modulation scheme with nonconstant …

Power amplifier linearisation using digital predistortion and multi‐port techniques

MR Beikmirza, A Mohammadi… - IET Science …, 2016 - Wiley Online Library
Power amplifiers are essential components in communication systems and are inherently
non‐linear. The non‐linearity creates spectral growth (broadening) beyond the signal …

A Cartesian error feedback architecture

J Li, Z Xu, W Hong, QJ Gu - … on Circuits and Systems I: Regular …, 2017 - ieeexplore.ieee.org
A Cartesian error feedback architecture is proposed to address the linearity-noise tradeoff in
the conventional Cartesian feedback architecture. First, the tradeoff in the conventional …

[PDF][PDF] 一种基于双通道非线性反馈架构的模拟域功率放大器线性化技术

全欣, 张梦瑶, 刘简, 蒲云逸, 刘颖, 邵士海, 唐友喜 - 电子与信息学报, 2023 - jeit.ac.cn
该文提出一种在模拟域抑制功率放大器(PA) 非线性失真的双通道非线性反馈架构, 以改善PA
线性度, 减少邻道泄露. 在该架构中, 用于抑制非线性的电路包含非线性提取环路和反馈调整环路 …

A Cartesian feedback-feedforward transmitter IC in 130nm CMOS

S Ock, H Song, R Gharpurey - 2015 IEEE Custom Integrated …, 2015 - ieeexplore.ieee.org
A transmitter architecture based on Cartesian feedback-feedforward is described. A
Cartesian feedback loop is used to linearize a transmitter and PA, and the error signal is …

Power amplifier behavioral modeling by neural networks and their implementation on FPGA

RSN Ntouné, M Bahoura… - 2012 IEEE Vehicular …, 2012 - ieeexplore.ieee.org
In this paper, field programmable gate array (FPGA) implementation of two power amplifier
(PA) dynamic behavioral modeling approaches with real-valued time-delay neural network …

A 40% PAE and 34 dBm Peak OIP3 CMOS Power Amplifier with Integrated Zero Power Consumption Phase Linearizer

P Gunasegaran, J Rajendran, S Mariappan… - Journal of Circuits …, 2023 - World Scientific
In this paper, an Integrated Phase Linearizer (IPL) technique is designed to improve the
linearity performance of a CMOS power amplifier (PA). The IPL is integrated at the gate of …