System, method, and computer program product for improving memory systems

MS Smith - US Patent 9,432,298, 2016 - Google Patents
H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid
state devices; Multistep manufacturing processes thereof the devices being of types …

Understanding reduced-voltage operation in modern DRAM devices: Experimental characterization, analysis, and mechanisms

KK Chang, AG Yağlıkçı, S Ghose, A Agrawal… - Proceedings of the …, 2017 - dl.acm.org
The energy consumption of DRAM is a critical concern in modern computing systems.
Improvements in manufacturing process technology have allowed DRAM vendors to lower …

Memory scaling: A systems architecture perspective

O Mutlu - 2013 5th IEEE International Memory Workshop, 2013 - ieeexplore.ieee.org
The memory system is a fundamental performance and energy bottleneck in almost all
computing systems. Recent system design, application, and technology trends that require …

A survey of architectural techniques for DRAM power management

S Mittal - … Journal of High Performance Systems Architecture, 2012 - inderscienceonline.com
Recent trends of CMOS technology scaling and wide-spread use of multicore processors
have dramatically increased the power consumption of main memory. It has been estimated …

Chameleon: Versatile and practical near-DRAM acceleration architecture for large memory systems

H Asghari-Moghaddam, YH Son… - 2016 49th annual …, 2016 - ieeexplore.ieee.org
The performance of computer systems is often limited by the bandwidth of their memory
channels, but further increasing the bandwidth is challenging under the stringent pin and …

[PDF][PDF] Research problems and opportunities in memory systems

O Mutlu, L Subramanian - Supercomputing frontiers and …, 2014 - superfri.susu.ru
The memory system is a fundamental performance and energy bottleneck in almost all
computing systems. Recent system design, application, and technology trends that require …

IMP: Indirect memory prefetcher

X Yu, CJ Hughes, N Satish, S Devadas - Proceedings of the 48th …, 2015 - dl.acm.org
Machine learning, graph analytics and sparse linear algebra-based applications are
dominated by irregular memory accesses resulting from following edges in a graph or non …

What your DRAM power models are not telling you: Lessons from a detailed experimental study

S Ghose, AG Yaglikçi, R Gupta, D Lee… - Proceedings of the …, 2018 - dl.acm.org
Main memory (DRAM) consumes as much as half of the total system power in a computer
today, due to the increasing demand for memory capacity and bandwidth. There is a …

Gather-scatter DRAM: In-DRAM address translation to improve the spatial locality of non-unit strided accesses

V Seshadri, T Mullins, A Boroumand, O Mutlu… - Proceedings of the 48th …, 2015 - dl.acm.org
Many data structures (eg, matrices) are typically accessed with multiple access patterns.
Depending on the layout of the data structure in physical address space, some access …

A survey of techniques for improving error-resilience of DRAM

S Mittal, MS Inukonda - Journal of Systems Architecture, 2018 - Elsevier
Aggressive process scaling and increasing demands of performance/cost efficiency have
exacerbated the incidences and impact of errors in DRAM systems. Due to this …