A high-speed low-power latched CMOS comparator circuit is presented. Demonstrated is a
circuit optimisation technique to obtain minimum offset error at 500 MHz sampling speed …

A 10b 1GS/s ADC employing a single channel cascaded folding architecture is presented.
Conversion speed of 1GS/s is attained by incorporating low-power distributed track-and …

" Design Techniques for A CMOS Low-Power Low-Voltage Fully Differential Flash Analog-
To-Digital Converter"; Tsung-Sum Lee, Li-Dyi Luo, and Chin-Sheng Lin, Department of …

By means of a standard 0.18 μm CMOS process a novel CMOS voltage comparator circuit
has been proposed which is capable of resolving 400μV. Employing preamplifier latch …

This paper describes the design of a high speed min/max architecture based on a new
current comparator. The main advantage of the proposed circuit which employs a novel …

This article consists in an up-to-date bibliography on current-mode circuits. The purpose is to
provide the reader with a comprehensive list of references directly related to this particular …

SiGeBiCMOS 提供了性能极其优异的HBT (异质结晶体管), 其ft 超过70GHz, β> 120, 高线性,
低噪声, 非常适合高频领域应用. 本文基于SiGeBiCMOS 工艺, 提出了一种高性能全差分超高速 …

“Design Techniques for a CMOS Low-Power Low-Voltage Fully Differential Flash Analog-To-
Digital Converter'; Tsung-Sum Lee, Li-Dyi Luo, and Chin-Sheng Lin, Department of …

This paper presents a high speed current mode CMOS comparator. The comparator was
optimized for allows wide range input current 1mA,/spl plusmn/0.5 uA resolution and has fast …

This paper presents a new approach based on current mode circuits for fast and accurate
optical level monitoring with wide dynamic range of a gigabit burst-mode laser driver chip …