Methods and apparatus for dynamic batching of data for neural network workloads

E Luk, M Elmalaki, S Almalih, C Brick - US Patent 12,124,941, 2024 - Google Patents
Examples to determine a dynamic batch size of a layer are disclosed herein. An example
apparatus to determine a dynamic batch size of a layer includes a layer operations controller …

Generation of executable files corresponding to neural network models

S Chatterjee, SV Lakshminarasimha… - US Patent …, 2023 - Google Patents
2019-01-29 Assigned to HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
reassignment HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP ASSIGNMENT OF …

Storage of input values within core of neural network inference circuit

K Duong, J Ko, SL Teig - US Patent 11,468,145, 2022 - Google Patents
Some embodiments provide a neural network inference circuit (NNIC) for executing a NN
that includes multiple computation nodes at multiple layers. Each of a set of the computation …

Neural network inference circuit employing dynamic memory sleep

J Ko, K Duong, SL Teig - US Patent 11,347,297, 2022 - Google Patents
For a neural network inference circuit that executes a neural network including multiple
computation nodes at multiple layers for which data is stored in a plurality of memory banks …

Compiler for implementing memory shutdown for neural network implementation configuration

B Thomas, SL Teig - US Patent 11,615,322, 2023 - Google Patents
US11615322B1 - Compiler for implementing memory shutdown for neural network
implementation configuration - Google Patents US11615322B1 - Compiler for implementing …

Neural network inference circuit read controller with multiple operational modes

J Ko, K Duong, SL Teig - US Patent 11,568,227, 2023 - Google Patents
G06F7/48—Methods or arrangements for performing computations using exclusively
denominational number representation, eg using binary, ternary, decimal representation …

Time-multiplexed dot products for neural network inference circuit

J Ko, K Duong, SL Teig - US Patent 11,295,200, 2022 - Google Patents
Some embodiments provide a method for a neural network inference circuit that executes a
neural network including multiple nodes. The method loads a first set of weight values into a …

Compiler for optimizing filter sparsity for neural network implementation configuration

B Thomas, SL Teig - US Patent 11,625,585, 2023 - Google Patents
US11625585B1 - Compiler for optimizing filter sparsity for neural network implementation
configuration - Google Patents US11625585B1 - Compiler for optimizing filter sparsity for …

Replication of neural network layers

EA Sather, SL Teig - US Patent 11,604,973, 2023 - Google Patents
Neural networks typically involve many (eg, thousands, millions, or even potentially billions)
of weights that are calculated during training and then used when the neural network is …

Multi-headed multi-buffer for buffering data for processing

R Prabhakar, NF Sheeley, A Menon, S Gupta… - US Patent …, 2022 - Google Patents
An integrated circuit includes a plurality of configurable units, each configurable unit having
two or more corresponding sections. The plurality of configurable units is arranged in a …