Throttling hull shaders based on tessellation factors in a graphics pipeline

N Pathak - US Patent 11,508,124, 2022 - Google Patents
(57) ABSTRACT A processing system includes hull shader circuitry that launches thread
groups including one or more primitives. The hull shader circuitry also generates tessellation …

Apparatus and method for speculative execution of instructions

MB Schinzler, M Filippo, Y Ishii - US Patent 11,003,454, 2021 - Google Patents
Apparatuses for data processing and methods of data processing are provided. A data
processing apparatus performs data processing operations in response to a sequence of …

System and method for dynamic accuracy and threshold control for branch classification

PAH Bhat, SK Sadasivam, S Saxena - US Patent 11,169,807, 2021 - Google Patents
(57) ABSTRACT A processor comprising a processor pipeline comprising one or more
execution units configured to execute branch instructions, a branch predictor associated with …

Branch confidence throttle

T Clouqueur - US Patent 11,507,380, 2022 - Google Patents
(57) ABSTRACT A processing system includes a processor with a branch predictor including
one or more branch target buffer tables. The processor also includes a branch prediction …

Micro-operation supply rate variation

G Bolbenes, TE Lanois, H Bouzguarrou… - US Patent …, 2024 - Google Patents
Processing circuitry performs processing operations in response to micro-operations. Front
end circuitry supplies the micro-operations to be processed by the processing circuitry …

Thread priorities using misprediction rate and speculative depth

RJ Eickemeyer, E Fatehi, JB Griswell… - US Patent …, 2023 - Google Patents
Methods and systems for determining a priority of a threads is described. A processor can
execute branch instructions of the thread. The processor can predict branch instruction …

Wave throttling based on a parameter buffer

CJ Brennan, N Pathak - US Patent 11,710,207, 2023 - Google Patents
A graphics pipeline includes a first shader that generates first wave groups, a shader
processor input (SPI) that launches the first wave groups for execution by shaders, and a …

Reuse of branch information queue entries for multiple instances of predicted control instructions in captured loops in a processor

DE Streett, RM Al Sheikh - US Patent 11,995,443, 2024 - Google Patents
Reuse of branch information queue entries for multiple instances of predicted control
instructions in captured loops in a processor, and related methods and computer-readable …

Throttling shaders based on resource usage in a graphics pipeline

N Pathak, RW Ramsey, T Litwiller… - US Patent 11,776,085, 2023 - Google Patents
A processing system includes a graphics pipeline that executes a first shader of a first type
and a second shader of a second type. In some cases, the first shader is a geometry shader …