Data allocation optimization for hybrid scratch pad memory with SRAM and nonvolatile memory
Embedded systems normally have a tight energy budget. Since the on-chip cache typically
consumes 25%-50% of the processor's area and energy consumption, scratch pad memory …
consumes 25%-50% of the processor's area and energy consumption, scratch pad memory …
Management and optimization for nonvolatile memory-based hybrid scratchpad memory on multicore embedded processors
The recent emergence of various Non-Volatile Memories (NVMs), with many attractive
characteristics such as low leakage power and high-density, provides us with a new way of …
characteristics such as low leakage power and high-density, provides us with a new way of …
Volatile STT-RAM scratchpad design and data allocation for low energy
G Rodríguez, J Touriño, MT Kandemir - ACM Transactions on …, 2014 - dl.acm.org
On-chip power consumption is one of the fundamental challenges of current technology
scaling. Cache memories consume a sizable part of this power, particularly due to leakage …
scaling. Cache memories consume a sizable part of this power, particularly due to leakage …
Effective stack wear leveling for nvm
With the rapid growth of data processed by computer systems, nonvolatile memory (NVM),
represented by phase change memory (PCM), is regarded as a promising next-generation …
represented by phase change memory (PCM), is regarded as a promising next-generation …
Compile-time silent-store elimination for energy efficiency: An analytic evaluation for non-volatile cache memory
Energy-efficiency has become very critical in modern high-performance and embedded
systems. In on-chip systems, memory consumes an important part of energy. Emerging non …
systems. In on-chip systems, memory consumes an important part of energy. Emerging non …
WCET-aware energy-efficient data allocation on scratchpad memory for real-time embedded systems
Scratchpad memory (SPM) is a software-managed, small, on-chip form of memory. For real-
time embedded systems, worst case execution time (WCET) is more important than average …
time embedded systems, worst case execution time (WCET) is more important than average …
Optimizated allocation of data variables to PCM/DRAM-based hybrid main memory for real-time embedded systems
Phase-change memory (PCM) has many advantages compared to conventional DRAM,
including nonvolatility, low static energy consumption, and high reliability. Its drawbacks …
including nonvolatility, low static energy consumption, and high reliability. Its drawbacks …
OPTIMAS: Overwrite purging through in-execution memory address snooping to improve lifetime of NVM-based scratchpad memories
AMH Monazzah, H Farbeh… - IEEE Transactions on …, 2017 - ieeexplore.ieee.org
SRAM-based scratchpad memories (SPMs) used in embedded systems impose high
leakage power. Designing SPMs based on non-volatile memories (NVMs) were proposed …
leakage power. Designing SPMs based on non-volatile memories (NVMs) were proposed …
Scheduling to optimize cache utilization for non-volatile main memories
In power and size sensitive embedded systems, non-volatile memories (NVMs) are
replacing DRAM as the main memory since they have higher density, lower static power …
replacing DRAM as the main memory since they have higher density, lower static power …
How could compile-time program analysis help leveraging emerging NVM features?
Beyond the fact of generating machine code, compilers play a critical role in delivering high
performance, and more recently high energy efficiency. For decades, the memory …
performance, and more recently high energy efficiency. For decades, the memory …