Microprocessor architecture and design in post exascale computing era

W Di, LI Hong-Liang - 2021 6th International Conference on …, 2021 - ieeexplore.ieee.org
In the post exascale computing era, the energy efficiency improvement speed of traditional
complementary metal-oxide-semiconductor (CMOS) process has slowed down significantly …

A New Low-Power Circuit Design Optimization for Image Processing

M Liu, S Feng, W Shan, H Que, J Wang, X Yang - Electronics, 2025 - mdpi.com
A simple-to-implement and easy-to-integrate strategy for image processing is proposed in
this paper, which effectively and efficiently optimizes the power consumption of both DRAM …

Standard Cell Optimization Techniques for Near Threshold Computing–A Review

N Johny, R Jayagowri - 2020 4th International Conference on …, 2020 - ieeexplore.ieee.org
With advances in technology, the number of transistors in the chip increases resulting in
large increase in the power budget. The increasing power budgets prohibit these devices …

Near Threshold Design Technology Optimization in 12LP Process

N Jain, R Fetherston, D Bagmar… - 2020 4th IEEE …, 2020 - ieeexplore.ieee.org
Near Threshold Design has become a key design and technology co-optimization area due
to a recent explosion of ultra-low power design required for Artificial Intelligence and …

Dynamic voltage Drop induced Path Delay Analysis for STV and NTV Circuits during At-speed Scan Test

H Oh, H Kim, S Lee, S Kang - 2018 International SoC Design …, 2018 - ieeexplore.ieee.org
The NTV circuit has been introduced as a new low power design concept, which increases
energy efficiency significantly. However, delay sensitivity of the NTV circuit is a major …

Design and Characterization Techniques for Reliable and Secure Integrated Circuits

Q Tang - 2017 - search.proquest.com
For the past decades of years, device feature size has continued to shrink for achieving
better performance at faster speed, lower power and higher circuit density. However, going …

Self-Timed Pipeline Register Operating at Near-Threshold Voltage

T Ogawa, M Iwata - … of the International Conference on Parallel …, 2016 - search.proquest.com
In recent years, steady improvement on both performance and energy efficiency of LSI
systems by virtue of the miniaturization of CMOS process has been harder. However, lower …

[PDF][PDF] A Fast and Low Power Hardware Accelerator for ANN Working at Near Threshold Voltage

T Chen, S Yin, S Wei - 2016 - atlantis-press.com
Artificial neural network (ANN)[1], an adaptive nonlinear dynamic system composed of a
large number of neurons through a very rich and perfect connection, is a simulation of …

[引用][C] A Characterization Method for Standard Cell Library at Near-Threshold Voltage

HU Wei, AN Benting, Y Jia - Journal of Hunan University Natural Sciences, 2019