[HTML][HTML] EEG-based driving fatigue detection using multilevel feature extraction and iterative hybrid feature selection
Brain activities can be evaluated by using Electroencephalogram (EEG) signals. One of the
primary reasons for traffic accidents is driver fatigue, which can be identified by using EEG …
primary reasons for traffic accidents is driver fatigue, which can be identified by using EEG …
A dynamic center and multi threshold point based stable feature extraction network for driver fatigue detection utilizing EEG signals
Driver fatigue is the one of the main reasons of the traffic accidents. The human brain is a
complex structure, whose function can be evaluated with electroencephalogram (EEG) …
complex structure, whose function can be evaluated with electroencephalogram (EEG) …
Fast RNS FPL-based communications receiver design and implementation
Currently, several design barriers inhibit the implementation of high-precision digital signal
processing (DSP) systems with field programmable logic (FPL) devices. A new …
processing (DSP) systems with field programmable logic (FPL) devices. A new …
Encryption Using Residue Number System: Research Trends and Future Challenges
R Shevchuk, I Yakymenko… - 2024 14th International …, 2024 - ieeexplore.ieee.org
This paper presents a comprehensive knowledge mapping and in-depth analysis of the
application of residue number system in encryption technique research to understand better …
application of residue number system in encryption technique research to understand better …
Design and implementation of high-performance RNS wavelet processors using custom IC technologies
The design of high performance, high precision, real-time digital signal processing (DSP)
systems, such as those associated with wavelet signal processing, is a challenging problem …
systems, such as those associated with wavelet signal processing, is a challenging problem …
RNS-based implementation of 8× 8 point 2D-DCT over field-programmable devices
PG Fernandez, A Lloris - Electronics Letters, 2003 - search.proquest.com
A new implementation of an 8 x 8 two-dimensional discrete cosine transform (2D-DCT)
processor based on the residue number system (RNS), is presented. This architecture …
processor based on the residue number system (RNS), is presented. This architecture …
High performance, reduced complexity programmable RNS-FPL merged FIR filters
J Ramirez, U Meyer-Baese - Electronics Letters, 2002 - search.proquest.com
High performance, reduced complexity programmable residue number system, field
programmable logic merged wavelet FIR filters are presented. The systems are based, on …
programmable logic merged wavelet FIR filters are presented. The systems are based, on …
Pseudorandom number generator based on the residue number system and its FPGA implementation
CA Gayoso, C González, L Arnone… - 2013 7th Argentine …, 2013 - ieeexplore.ieee.org
In this paper a novel Pseudorandom Number Generator is presented. It is based on the
Residue Number System (RNS), which allows us to design a very fast circuit that has a very …
Residue Number System (RNS), which allows us to design a very fast circuit that has a very …
Fast RNS-based 2D-DCT computation on field-programmable devices
This paper shows the implementation of an 8/spl times/8 2D-DCT (discrete cosine transform)
processor based on the residue number system (RNS). It makes use of a fast cosine …
processor based on the residue number system (RNS). It makes use of a fast cosine …
A RNS-based matrix-vector-multiply FCT architecture for DCT computation
A Field-Programmable Logic (FPL) implementation of the Discrete Cosine Transform (DCT)
based on the Residue Number System (RNS) is presented. It uses a combination of the Fast …
based on the Residue Number System (RNS) is presented. It uses a combination of the Fast …