With asynchronous circuit design becoming a powerful tool in the development of new
digital systems, circuit designers are expected to have asynchronous design skills and be …

This paper describes a newdata structure, difference decision diagrams (DDDs), for
representing a Boolean logic over inequalities of the form xy≤ c where the variables are …

This paper describes an investigation of potential advantages and pitfalls of applying an
asynchronous design methodology to an advanced microprocessor architecture. A prototype …

This paper describes an investigation of potential advantages and risks of applying an
aggressive asynchronous design methodology to Intel Architecture. RAPPID (" Revolving …

The paper presents a partial order reduction method applicable to networks of timed
automata. The advantage of the method is that it reduces both the number of explored …

We present the modeling mechanism employed in Metropolis, a design environment for
heterogeneous embedded systems, and a design methodology based on the mechanism …

In this paper we argue that the semantic issues of discrete vs. dense time should be
separated as much as possible from the pragmatics of state-space representation. Contrary …

We present a new approach to the symbolic model checking of timed automata based on a
partial order semantics. It relies on event zones that use vectors of event occurrences …

Classic distributed computing abstractions do not match well the reality of digital logic gates,
which are the elementary building blocks of Systems-on-Chip (SoCs) and other Very Large …

Current approaches for analyzing timed systems are based on an explicit enumeration of the
discrete states and thus these techniques are only capable of analyzing systems with a …