A low power 1.8 V 4-bit 400-MHz flash ADC in 0.18/spl mu/digital CMOS

S Banik, D Gangopadhyay… - … Conference on VLSI …, 2006 - ieeexplore.ieee.org
This paper is devoted to the design and implementation of high speed, low power, low
voltage flash analog-to-digital convertors (ADC). A 4-bit flash ADC, with a maximum …

A very low-power flash A/D converter based on CMOS inverter circuit

SC Hsia, WC Lee - Fifth international workshop on system-on …, 2005 - ieeexplore.ieee.org
A/D converter (ADC) is a basic device in digital signal processing systems. For high-speed
applications, a flash ADC type is often used. Due to require many analog comparators, the …

A 1-GS/s CMOS 6-bit flash ADC with an offset calibrating method

CH Chang, CY Hsiao, CY Yang - 2008 IEEE International …, 2008 - ieeexplore.ieee.org
In this paper a 1-GS/s 6-bit flash type analog-to-digital converter (ADC) is designed in 0.18-
μm one-poly six-metal CMOS. An offset calibrating method is used to improve the …

Design of low power 4-bit 400MS/s standard cell based flash ADC

SM Mayur, RK Siddharth, NK YB… - 2017 IEEE Computer …, 2017 - ieeexplore.ieee.org
In this paper, a low power 4-bit 400 MS/s standard cell based flash Analog-to-Digital
Converter (ADC) is presented. The proposed flash ADC uses comparators based on the …

A 7-bit 500-MHz flash ADC

A Jayakumar, K Vishnu - 2014 First International Conference on …, 2014 - ieeexplore.ieee.org
This paper describes the systematic design of a high speed and high resolution CMOS
Flash Analog-To-Digital Converter. A 7-bit flash ADC is implemented in cadence …

1 GS/s, low power flash analog to digital converter in 90nm CMOS technology

C Mostafa, H Qjidaa - 2012 International Conference on …, 2012 - ieeexplore.ieee.org
The analog to digital converters is the key components in modern electronic systems. As the
digital signal processing industry grows the ADC design becomes more and more …

A 3-GS/s 5-bit flash ADC with wideband input buffer amplifier

J Matsuno, M Hosoya, M Furuta… - … Design, Automation, and …, 2013 - ieeexplore.ieee.org
This paper presents a 3-GS/s 5-bit interpolated Flash ADC with a wideband input buffer
amplifier. Small input capacitance of the ADC is necessary to achieve high signal bandwidth …

Design of ultra low power flash ADC using TMCC & bit referenced encoder in 180nm technology

A Kar, A Majumder, AJ Mondal… - … Conference on VLSI …, 2015 - ieeexplore.ieee.org
Analog-to-digital converters (ADCs) are needed in all those applications, which interface
with the analogue world and exploit the digital processing of data. As digital processing is …

Design of low power 5-bit hybrid flash ADC

SM Mayur, RK Siddharth, YBN Kumar… - 2016 IEEE Computer …, 2016 - ieeexplore.ieee.org
In this paper, a low power 5-bit hybrid flash architecture is proposed. The proposed analog-
to-digital converter (ADC) uses appropriate combination of both conventional double-tail …

Design of a low power, variable-resolution flash ADC

S Veeramachanen, AM Kumar… - … Conference on VLSI …, 2009 - ieeexplore.ieee.org
In this paper, a low power and variable resolution (adaptive) flash ADC is proposed. The
ADC enables exponential power reduction while the reduction in resolution is linear. In the …