Fault detection in CMOS/SOI mixed-signal circuits using the quiescent current test
D De Venuto, M Kayal, MJ Ohletz - Microelectronics journal, 2002 - Elsevier
Main stream bulk CMOS and the variants of silicon-on-insulator (SOI) CMOS technologies
are discussed with respect to testing for the quiescent current of mixed-signal integrated SOI …
are discussed with respect to testing for the quiescent current of mixed-signal integrated SOI …
Novel design for testability schemes for CMOS ICs
M Favalli, P Olivo, M Damiani… - IEEE Journal of Solid …, 1990 - ieeexplore.ieee.org
The authors present ideas for addressing the problem of detecting non-stuck-at faults in
CMOS circuits that cannot be revealed by means of conventional methods (ie, as logical …
CMOS circuits that cannot be revealed by means of conventional methods (ie, as logical …
A new BICS for CMOS operational amplifiers by using oscillation test techniques
In this paper, we present a built-in current sensor to test operational amplifiers that takes
advantage of previous results where the negative supply current has been taken as the test …
advantage of previous results where the negative supply current has been taken as the test …
A BIST scheme for operational amplifier by checking the stable output of transient response
Y Jun, T Masayoshi - … Conference on Circuit Theory and Design …, 2011 - ieeexplore.ieee.org
This paper presents a built-in self-test (BIST) scheme for operational amplifier (Op Amp).
Without any parameters modification, the designed BIST system can be applied to test all the …
Without any parameters modification, the designed BIST system can be applied to test all the …
Testable realizations for FET stuck-open faults in CMOS combinational logic circuits
SM Reddy, MK Reddy - IEEE transactions on Computers, 1986 - ieeexplore.ieee.org
In this paper, potential invalidation of stuck-open fault-detecting tests, derived by neglecting
circuit delays and charge distribution in CMOS logic circuits, is studied. Several classes of …
circuit delays and charge distribution in CMOS logic circuits, is studied. Several classes of …
On the testability of CMOS feedback amplifiers
AJ Bishop, A Ivanov - … Workshop on Defect and Fault Tolerance …, 1994 - ieeexplore.ieee.org
This paper examines the testability of a CMOS operational amplifier (op-amp) in four
different feedback configurations. Feedback is often considered to complicate the testing …
different feedback configurations. Feedback is often considered to complicate the testing …
A complete scheme of built-in self-tests (BIST) structure for fault diagnosis in analog circuits and systems
AA Hatzopoulos, S Siskos… - IEEE transactions on …, 1993 - ieeexplore.ieee.org
The implementation of BIST in analog circuits is investigated, and a complete BIST scheme
is proposed. This scheme can be included in any analog or mixed analog-digital circuit and …
is proposed. This scheme can be included in any analog or mixed analog-digital circuit and …
CMOS circuit testability
PS Moritz, LM Thorsen - IEEE journal of solid-state circuits, 1986 - ieeexplore.ieee.org
CMOS circuits present unique testing problems. Although open faults in CMOS circuits can
be statistically tested, a sequence of patterns is required to guarantee a test. In addition …
be statistically tested, a sequence of patterns is required to guarantee a test. In addition …
Built-in self test of S2I switched current circuits
GE Sether, C Toumazou, G Taylor, K Eckersall… - … Integrated Circuits and …, 1996 - Springer
This article presents a new concept for built-in self test of switched current circuits based on
S 2 I memory cells. From the spectrum of possible transistor defects reported in CMOS …
S 2 I memory cells. From the spectrum of possible transistor defects reported in CMOS …